A review of specification and verification methods for parallel programs, including the dataflow approach
Article Abstract:
A new formal dataflow graph-based model is developed for the specification and verification of parallel programs. Such formal descriptive and proof methods are necessary because identifying the cause of failures in programs based on informal specifications is often a very complex task. Three trace-based formal models are first considered: communicating sequential processes, the scenario model, and the behavior model. Trace-based models offer such advantages as ability to abstract processes, simplicity and ability to hide superfluous internal aspects. Details of the functioning and advantages of each trace-based model are described. Dataflow modeling applies well to parallel, distributed programming because of the asynchronous interaction between parallel processes. The dataflow-based 'marking model' provides a composition proof system with partially ordered time.
Publication Name: Proceedings of the IEEE
Subject: Electronics
ISSN: 0018-9219
Year: 1989
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The changing nature of disk controllers
Article Abstract:
Disk drive storage devices began a revolution in information processing when first introduced in 1956. The resulting growth in computing systems applications enabled on-line database transaction processing in real time. Disk controllers interface storage devices and subsystems with host systems. The controller's nature and functions have changed along with the increases in magnetic disk storage density over the years. Disk technology is expected to continue to develop through the next decade at its present rate, or possibly an even faster rate. The introduction of the microcomputer in the 1980s resulted in the development of the single-board controller, usually attached to a hard disk drive. The 1990s are seeing radical changes in the attachment of a drive to a system. The evolution of disk controllers and their future are discussed.
Publication Name: Proceedings of the IEEE
Subject: Electronics
ISSN: 0018-9219
Year: 1993
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A language for compositional specification and verification of finite state hardware controllers
Article Abstract:
The state machine language (SML), the language used to describe complex finite state hardware controllers, provides many of the standard control structures found in modern programming languages. For example, state tables produced by the SML compiler can be used as input to a temporal logic model checker that can determine automatically if logic CTL specification is satisfied. SML extensions allow for a compositional approach to model checking, which reduces design complexity. The method is applied to the specification and verification of a CPU controller.
Publication Name: Proceedings of the IEEE
Subject: Electronics
ISSN: 0018-9219
Year: 1991
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