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Parallel circuit simulation on supercomputers

Article Abstract:

A variety of direct and relaxation-based approaches to circuit simulation on parallel-processing supercomputers are extensively described, evaluated and compared. A hierarchical waveform relaxation-based approach is being developed for implementation on the University of Illinois (Urbana, IL) Center for Supercomputing Research and Development CEDAR multiprocessor. Circuit simulation is vital to the successful computer-aided design of very-large-scale integration integrated circuits, but the process is computationally intense and time-consuming. Supercomputers can provide the computational power required for rapid solution of the circuit simulation equations. The parallel direct and relaxation algorithms described have been developed for implementation on general-purpose multiprocessor architectures with a limited number of processors and shared-memory.

Author: Saleh, Resve A., Gallivan, Kyle A., Chang, Mi-Chang, Hajj, Ibrahim N., Smart, David, Trick, Timothy N.
Publisher: Institute of Electrical and Electronics Engineers, Inc.
Publication Name: Proceedings of the IEEE
Subject: Electronics
ISSN: 0018-9219
Year: 1989
Noncommercial research organizations, Circuit design, Very large scale integration, Parallel processing, Evaluation, Comparison, Simulation, Case Study, Methods, Very-Large-Scale Integration, Illinois, University of (Urbana-Champaign). Center for Supercomputing Research and Development

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Array processor supercomputers

Article Abstract:

Array processor supercomputers consist of a single instruction multiple data (SIMD) architecture of large numbers of very simple processing elements (PEs). Current implementations may contain up to 64,000 PEs and execute up to 4 billion operations per second. Common characteristics of array processor SIMD machines include synchronous operation, massive parallelism, 'corner turning' conversion of data from word-serial bit-parallel to bit-serial word-parallel form and very high input/output rates. Array processor designs are differentiated by interprocessor communication, PE-to-memory configuration, corner-turning methods and host-to-array control path. SIMD array processors are shown to be effective in the solution of computationally intensive image convolution problems, real-time database management (air traffic control), and graph algorithm problems.

Author: Potter, J.L., Meilander, W.C.
Publisher: Institute of Electrical and Electronics Engineers, Inc.
Publication Name: Proceedings of the IEEE
Subject: Electronics
ISSN: 0018-9219
Year: 1989
Systems analysis, Technology, Specifications, System Design, Applications, Array Processor, SIMD, Taxonomy

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Subjects list: Supercomputers, Supercomputer, technical
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