Designing mixed-signal ICs

Article Abstract:

As circuit designers include both analog and digital circuits on the same application-specific integrated circuit (ASIC) substrate, semiconductor fabrication houses must optimize processing technologies for both types of circuitry. One problem with this scenario is that traditional digital processes are usually not optimized for the high transconductance and other aspects of analog circuitry. Another problem is that analog design tools are not yet mature. These discrepancies are becoming more serious as the integrated circuit market increasingly calls for tightly coupled mixed-signal chips. Although digital designs are best developed with a high level of abstraction, and this method is not ideally suited to the detail of analog-circuit design, simulation tools form a significant fraction of the computer-aided design (CAD) tools available for integrated circuit design. Hardware description languages and phyical design is discussed. A directory of vendors and products is presented.

Methods, Mixed-Signal Integrated Circuits

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More logic synthesis for ASICs

Article Abstract:

Today's designers need more sophisticated computer-aided design (CAD) tools that significantly reduce application-specific integrated circuit (ASIC) design time. Hardware description languages (HDL), such as Verilog HDL and the very high-speed integrated circuit hardware description language (VHDL), can speed the entry of ASIC data into a CAD tool by describing a complex design at a high level of abstraction from the actual device. However, schematic entry is limited by the lack of standards for schematic-circuit libraries, and changing between libraries is difficult. New features in logic synthesis tools allow back annotation of delay and a closer link with the physical layout tools, but logic synthesis does not work as well with some ASIC technologies as it does with others. Limitations of logic synthesis, intelligent synthesis, graphical design entry and future developments are discussed. A directory of vendors and products is presented.

Usage, Interoperability, Hardware Description Language, Hardware description languages

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Logic synthesis for ASICs

Article Abstract:

Logic synthesis packages transform a function's specification and its timing into an application-specific integrated circuit (ASIC). With logic synthesis software, if the input specification is for a finite-state machine, sequential optimization is employed to collapse equivalent states and find a state that limits the logic to be generated. The two chief standards for these packages are Verilog, which should soon become an open standard, and VHDL, which is rapidly gaining interest. Unforeseen breakthroughs are expected in the logic synthesis arena. For example, the software should soon include new features, such as sequential logic synthesis, high-level synthesis and formal design verification. The key platforms for logic synthesis tools include Sun Sparcstations and microcomputers.

Cover Story, Software Packages, Trends, Enhancements

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