Fault diagnosis at substations based on sequential event recorders
Article Abstract:
Expert systems at the substation level can provide a way to improve the maintenance and control of power systems. Digital Integrated Control and Protection Systems in substations are part of a recent trend that uses clusters of microprocessors and one or more computers. As more data is made available to users and protection schemes become more sophisticated, users will need greater power system analysis methods. Bottlenecks of data transmission links can be avoided by delegating diagnostic tasks to the lowest possible levels and the diagnostician can work on more reliable data. Diagnoses require more than just information from a substation. Users need a method to acquire data from neighboring substations quickly and accurately, and an arbitrator in the event of contradictory syntheses issued by the substations.
Publication Name: Proceedings of the IEEE
Subject: Electronics
ISSN: 0018-9219
Year: 1992
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A novel design of sequential network to facilitate fault detection
Article Abstract:
A novel design is presented for a large-scale integrated (LSI) sequential network designed to ease the single-fault detection problem. This design requires no control elements. Theorems are discussed which shows how the design allows the test procedure to be improved by generating test input sequences for only a few of the network's lines. This removes the necessity of considering all of the network's lines as would be required were existing techniques employed.
Publication Name: Proceedings of the IEEE
Subject: Electronics
ISSN: 0018-9219
Year: 1987
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A novel design of a combinational network to facilitate fault detection
Article Abstract:
A new combinational network design is introduced that facilitates the single stuck-at fault detection problem. A combinational network with n primary input variables requires only n+1 predefined primary input patterns to detect any kind of single fault on any line of the network. Therefore, the difficult task of generating test input patterns is summarily avoided. Initial cost of implementation is high, as the design requires a large number of logic gates.
Publication Name: Proceedings of the IEEE
Subject: Electronics
ISSN: 0018-9219
Year: 1987
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