MUPSI: a multiprocessor for signal processor
Article Abstract:
A new multiprocessor system can be used to implement signal processing systems in real time up to about 100-KHz. The new system, called MUPSI, consists of four task processors connected by a ring bus. The task processors have a special architecture chosen to achieve the processing rates needed by digital signal processing applications. The system currently reaches about 50 Mflops.The architecture includes three independent memories each connected to a separate address calculator. Two are data memories, and one serves for program code and data storage. The architecture is especially suited for high-speed performance. Software is arranged in three levels, including a high-level language SFL suited for problems described by block diagrams. The compiler generates separate processes that are automatically distributed onto the system by taking care of memory restrictions.
Publication Name: Proceedings of the IEEE
Subject: Electronics
ISSN: 0018-9219
Year: 1987
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A fast square-rooting algorithm using a digital signal processor
Article Abstract:
Asimple binary algorithm for square-rooting using a processor with a multiplier is presented. It uses only shifts, additions, and multiplications; the divisions used in the Newton-Raphson approach are not necessary. The algorithm is implemented in 16-bit fixed point arithmetic on a Texas Instruments TMS32010 DSP processor. The fixed-point code of the algorithm written in TMS32010 assembly language is provided.
Publication Name: Proceedings of the IEEE
Subject: Electronics
ISSN: 0018-9219
Year: 1987
User Contributions:
Comment about this article or add new information about this topic: