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Are you ready for next-generation dynamic RAM chips?

Article Abstract:

Performance and size account for the demand for higher density chips. The latest workstation uses 4M-bit dynamic random access memory (DRAM), has a reduced instruction set computer (RISC) chip as a central processor, features 40Mbytes DRAM and offers 13.5 MIPS. Future computers will have a power increase by a factor of at least four, and will require 16M-bit DRAMs. By 1995 there may be a need for a 64M-bit DRAM. Each generation of DRAMS has historically featured capacity four times greater than the preceding generation. Density increases have evolved from the fact that each generation of DRAM has a cell size one-third the size of its predecessor's cell size, and a chip size 1.5 times larger. Noise is a problem that must be overcome for chips with 16M-bits and higher. Bit line interference noise may be solved with a twisted bit line approach proposed by researchers at the Mitsubishi Electric Corp in Tokyo. Another approach, proposed by researchers at Fujitsu Ltd, involves shielding bit lines from each other with a cell capacitor. The biggest problem that must be overcome is getting enough cell capacitance into the available cell area.

Author: Masuoka, Fujio
Publisher: Institute of Electrical and Electronics Engineers, Inc.
Publication Name: IEEE Spectrum
Subject: Engineering and manufacturing industries
ISSN: 0018-9235
Year: 1990
Circuit design, Computer storage devices, Noise (Sound), DRAM (Dynamic random access memory), Capacitors, DRAM, Future Technologies, Packaging Density, Generations of Computers, Noise, Enhancements, High-Density Storage, Stack Architecture

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Japan Tests Its Model Communications System

Article Abstract:

The Mitaka pilot plant, or Model System, of the Nippon Telegraph and Telephone Public Corp. (NTT) will be the first test of the extensive Information Network System. The Model System will provide digital telephone and facsimile as well as remote teleconferencing. Digital techniques will improve NTT's Character and Pattern Telephone Access Information Network (Captain). A two-wire, time-compressed, multiple-transmission method minimizes crosstalk. An experimental broadband communications system will be used. A diagram illustrates the Model System and tables describe Model System services and hardware to be tested.

Author: Kuwabara, M.
Publisher: Institute of Electrical and Electronics Engineers, Inc.
Publication Name: IEEE Spectrum
Subject: Engineering and manufacturing industries
ISSN: 0018-9235
Year: 1984
Satellite communications, Fiber optics, Telecommunications, Digital communications, Information systems, Teleconferencing, Networks, Broadband, Integrated Systems, Japan, Communications Technology, Digital Communication

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