Enhanced dynamic RAM
Article Abstract:
Enhanced DRAM chips are designed to satisfy the need for zero wait states on all bus cycles, standard DRAM architecture and packaging for an easy system upgrade and no significant cost increase over standard DRAM. Enhanced DRAM chips feature a field-shield structure that isolates the wafer and reduces their junction capacitance, which increases the speed at which the transistors switch, and a 2K-bit static RAM cache row register that is accessed in 15 nanoseconds. Writing to the chip is speeded by an on-chip write-posting register; writes may be posted to the chip in 15 nanoseconds, and the cache may be read while the 65 nanosecond write cycle is completed in the background. Only five more pins are needed for enhanced DRAM as compared with standard DRAM chips, and like standard DRAMs, enhanced DRAMs are sold in a small-outline J-lead plastic package.
Publication Name: IEEE Spectrum
Subject: Engineering and manufacturing industries
ISSN: 0018-9235
Year: 1992
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The power of dynamic illustrations
Article Abstract:
Dynamic illustrations are software applications that combine one or more interactive controls for graphical representation. The benefits and the way it bridge the gap between abstraction and application by connecting students, allowing to engage statistical concepts and observe their behavior, are presented.
Publication Name: Quality Progress
Subject: Engineering and manufacturing industries
ISSN: 0033-524X
Year: 2005
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Enhanced bonding techniques heighten HPLC performance
Article Abstract:
Supelco Co. a division of Sigma-Aldrich Corp. have introduced a new generation high-performance liquid chromatography. The advantages of new method are presented.
Publication Name: Chemical Engineering Progress
Subject: Engineering and manufacturing industries
ISSN: 0360-7275
Year: 2005
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