Fast computer memories: designers are searching for new DRAM technologies to reduce memory access time and so unleash computer performance
Article Abstract:
The gap between processor and memory speed must be closed if the price-to-performance ratio of computer systems is to keep improving. Processor speed peaks only when the flow of data and instructions is fast and unfaltering, and that flow is especially necessary to reduced-instruction-set computer (RISC) processors. The truism of von Neumann's processor model persists today: slow memory is cheap and fast memory is expensive. While the first level of this hierarchy involves the processor's internal registers, the second level is the cache; a small, very fast memory. The third level is the main memory itself, which is used to store programs and data. Interleaving, or increasing memory bandwidth, is the most common way to increase main memory throughput, but it may require too much memory, and it has to be upgraded in increments of N. Synchronous and cached DRAMs are discussed.
Publication Name: IEEE Spectrum
Subject: Engineering and manufacturing industries
ISSN: 0018-9235
Year: 1992
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Ring of steel II
Article Abstract:
New York City's plans to replicate the high security system implemented in the district of City of London in London are discussed.
Publication Name: IEEE Spectrum
Subject: Engineering and manufacturing industries
ISSN: 0018-9235
Year: 2006
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